Generally speaking, the layout for the sensor die of a CMOS image sensor includes a sensor array, an Analog-to-Digital (ADC) module, digital logic circuits, and a timing and control panel. The sensor array is not centered on the sensor die in order to keep similar components together. The sensor die layout design is optimized to keep like components together, which allows for some advantages. For example, the ADC module in a conventional image sensor outputs in row-to-row image digital format, which is compatible with traditional image display devices. However, there are adverse consequences to these layout designs. For example, centering the sensor array on the die is sacrificed in order to keep similar components together. Additionally, by keeping like components together, the possibility of a smaller footprint for the sensor is held hostage to conventions. This can especially problematic for edge mount sensors such as imaging barcode scanners.
Therefore, a need exists for a CMOS image sensor, which allows the sensor array to be centered on the die as much as possible, and has a minimum height versus conventional image sensors.